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Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are:
You are a skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems. With a strong foundation in digital design and verification, you bring hands-on experience verifying complex ASIC designs and using advanced methodologies such as System Verilog and UVM to deliver thorough, high-quality results.
You thrive in fast-paced, collaborative environments and bring a proactive, self-directed approach to your work. You are comfortable debugging complex testbench and design issues, managing multiple priorities, and contributing thoughtful technical input across cross-functional teams. You are also motivated by continuous learning, knowledge sharing, and the opportunity to help shape leading-edge products.
What You’ll Be Doing:
- Develop and execute verification plans for complex ASIC designs, with a focus on next-generation HBM products, while writing and maintaining robust testcases using System Verilog and UVM
- Debug complex testbench and design issues, collaborate closely with design and mixed-signal engineering teams, and help drive issue resolution across the verification flow
- Automate verification flows and processes using scripting languages such as Python or Perl to improve efficiency, coverage, and productivity
- Contribute to design, architecture, and code reviews while documenting verification results, sharing best practices, and supporting team knowledge growth
- Documenting verification results, methodologies, and lessons learned to support knowledge sharing and process improvement.
- Help accelerate the development of high-performance, reliable HBM solutions for next-generation computing and AI applications
- Ensure the delivery of robust, high-quality silicon through strong verification planning, debugging, and execution
- Improve engineering effectiveness by advancing verification methodologies, identifying issues early, and contributing to continuous process improvement
- Strengthen team capability through collaboration, knowledge sharing, and technical contribution across the verification organization
- BSEE or MSEE with 6+ years of digital design and verification experience
- Proven experience writing and maintaining testcases using System Verilog and UVM, along with strong debugging skills for complex testbench and design issues
- Solid understanding of digital circuit design concepts and proficiency with scripting languages such as Python or Perl for automation and workflow improvement
- Demonstrated ability to work independently and collaboratively in a dynamic engineering environment
- Self-motivated, independent, and resourceful in tackling technical challenges
- A strong communicator and collaborative problem-solver with solid organizational skills
- Adaptable, detail-oriented, and committed to continuous learning and high-quality execution
- Passionate about innovation and contributing to a culture of excellence
You will be part of an experienced mixed-signal design and verification team, targeting the next generation of HBM products. Our team is composed of veteran digital and mixed-signal engineers who are committed to delivering high-end mixed-signal designs from specification development to performing functional and performance tests on prototype test-chips. We foster a collaborative and dynamic environment that provides continuous training and professional growth opportunities.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
